Flip-flop (electronics)

From ArticleWorld

A flip-flop is a sequential element involving one or more inputs and two complimentary outputs. It is essentially a bistable logic element with two stable conditions. Its operation is conditioned by its history – hence the term ‘sequential’.

A flip-flop is such a circuit that will stay in the last state as long as no new input signal effects a change in its state. The state of a flip-flop is present at one of the outputs, while the second output has the complement of the stored information. In this manner, bits of information can be stored. This is why flip-flops are considered to be the basic building blocks in digital circuits.

Flip-flops can be of several forms. Each form has its own unique features.

RS flip-flop

This is the most basic form of a flip-flop. All the different forms of flip-flops contain an RS flip-flop. It consists of two inputs referred to as set and reset and two outputs referred to as Q and . When a pulse is sent to the set input and no pulse is available at the reset input, a sustained voltage is obtained at the Q output. The output does not have any voltage.

Further pulses at the set input have no effect on the state of the output. However, a pulse at the reset input causes the output to ‘flip’. Any additional pulse at the reset input has no effect. The output may ‘flop’ back at the original condition once the inputs are switched.

The flip-flop is a toggle switch in the sense that it has only two possible positions. With a stable condition in either position not subject to further change, this form is known as a bistable two-input flip-flop. It may be comprised of digital logic elements such as OR and NOT gates (inverters).

Operation of the RS flip-flop

Consider an RS flip-flop with a pulse being sent at the set input and no pulse at the reset input. The pulse at the set input of one RS flip-flop results in a ‘high’ output Q which is applied to the inverter of a second RS flip-flop, which changes its output to a ‘low’. The reset input of the second flip-flop also has a ‘low’ signal given to it. Thus a ‘low’ output at the second flip-flop and a high output at the first flip-flop are seen to exist. A closed loop is formed in such a circuit; the output of the second flip-flop is fed to the input of the first flip-flop. The output voltage Q is thus maintained even if the set input has disappeared and the reset input remains low. ‘High’ inputs at both inputs of a flip-flop are never allowed, as a flip-flop cannot exist in both states at the same time.

Other forms of flip-flops are the D flip-flop, JK flip-flop and the T (toggle) flip-flop. These are modifications or refinements of the same basic flip-flop i.e. the RS flip-flop. A clock pulse may also be used in certain cases to provide an alternative source for the flip-flop to change state, as in a clocked RS flip-flop or a clocked JK flip-flop.